From John Wakerly, Oct 2025:

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 front view of the chassis, designed for standard 19" racks.

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Rear view.  The bottom three rows were different in  different  model which could have different 10 Mb/s interfaces (e.g., coax).

The fourth row could be configured with one or two 100 Mb/s FDDI interfaces and later, 155 Mb/s ATM

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Inside the box.  Cooling airflow was from right to left,  sucked out by fans in the power supply which was cooled by the same
air.

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A closer look.  There was a single motherboard.  At the back,  the three interface boards stacked onto a a motherboard connector,
and that stack of connectors formed the proprietary, patented high-speed buses into two ports of the patented shared memory.  
Another port was present on the unused connector at the back of the motherboard, for use by the optional FDDI module which 
stacked on top of the motherboard and had cable connections to the PHY modules mounted at the top row of the back panel.

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The main processor was an IDT R3001 CPU with a high speed external cache and interfaces to ROM, RAM, and one port of the
proprietery shared memory.

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The I/O processor was an IDT R3052 processor with a relatively  small amount of on-chip cache, perfect for the small amount of 
code and data needed to move packet descriptors to/from I/O queues once the forwarding decisions had been made by the Main CPU.
It also had a port into the shared memory.

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a closer look at the interface stack, obviously not designed for in-the-field module replacement, but easy enough to take apart
and put back together at the factory or service depot.